Date: 10 Sep 2022
As part of my job, I work with Mask Preparation team to help with their software tools. Most people are aware of what happens from the RTL stage to the final gds file stream out, for both digital and mixed-analog flow. I got to go ahead of the process and witness the after-steps in the IC developement flow.
Fortunately, I got a great reference book which covers the very specific part of what I am currently exploring. For the sake of this blog post I will keep things brief but for a detailed information refer to the book ‘Handbook of Photomask Manufacturing Technology by Syed Rizvi’. The steps I mentioned here are covered in the first two chapters in the mentioned book. I am not aware of how a mask is manufactured and what kind of machines are involved in the process so if you are interested in those concepts, which is the continuation of this blog post, refer to the above mentioned book.
Once the design is completed and the layout passes the DRC and LVS checks, it is then shared with the mask data preparation engineer whose job is to convert that layout into a set of different formats so that it can be printed on a “mirror” which is then used by those big UV machines which passes the light through this mirror and prints the pattern on the silicon wafer. That “mirror” is called as Mask (or sometimes called as Reticle, I heard that both terms are actually interchangeable but there is a seperate definition for both the terms). Once the gds file is shared with these engineers, they generate a set of data files which is used by the mask creation tools. Those data files contains the position of different sections apart from the actual chip, information which is used for error checks, information used by the stepper tools (From what I understood, a stepper tool nothing but a lithography tool - those giant machines), information used for compliance checks etc and other information such as barcodes, manufacturing information, company logo etc. A few of those files are mebes files, job decks, CD (critical dimension) files etc.
MEBES file format is the next version of the GDS file format. GDS and OASIS files are known as interchangeable files that are used between various steps in the IC backend design flow. Once the final layout is generated after passing all those checks, the GDS file is converted to the MEBES file format which is understood by the mask making tools. MEBES stands for Manufacturing Electron Beam Exposure System. These files not just contain the gds data but also other information like error markers, barcode information etc which are used in other following stages of the manufacturing flow. The conversion of gds files into mebes files is called as “fracturing”. Along with the mebes data, another file name “Job deck” is also generated by the mask data prep engineer. This file contains the instructions for the mask manufacturing tool. I do not know what exact information is communicated to the tool using this file. There is another file which contains the layer pattern information. Again not sure what exactly this is about but I think this data is related to the conversion of layer information present inside the gds files into the data that the mask manufacturing tool can understand. There is also a file named “Critical Dimension (CD)” which has the information about the sizes of various sections/items present on a reticle. This is used by the mask manufacturing tool to check the correctness of the internal mask dimensions. Since the lithography process doesn’t actually draw patterns on the silicon wafer precise to the dimensions mentioned in the gds files, there needs to some correction length added to them. If I understood correctly, this is what happens in the OPC (Optical Proximity Correction) step. The engineer makes sure that this correction is included in the mebes data before shipping to the mask manufactures.There might be additional data/files but this is what I understood about this particular stage of the IC development flow. Below is the picture of the data preparation and mask manufacturing flow from the reference book that I mentioned above.
This is often known to people who only deal with this stage and the upper technical management. But this is where the actual process of converting the IC design that is sitting in a folder on the server starts coming to life. I think the reason behind why this particular stage of the flow is ignored/hidden is that not much “tech” stuff happen. The whole design of the IC which is intended to do something has happened before this particular stage begins and the actual birth of that design happens in those large fabs inside those giant EUV machines and the real meaning of the technology node is defined in those fabs. So it makes sense behind why the mask preparation stage is neatly tucked inside between those two main parts of the flow - design and manufacturing of the IC. However, it is worth noting that an IC can be manufactured without a mask too (Maskless Photolithography). To get an idea on this process, refer to the below Sam Zeloof’s video. I will try to update this post as I learn more about this stage or write a seperate one if necessary.